A distributed computer architecture for qualitative simulation based on a multi-DSP and FPGAs

The design of a specialized computer architecture for qualitative simulation is presented. Our interest focuses on the hardware design of an application-speciic computer architecture which is composed of programmable processors (digital signal processors TMS320C40) and application-speciic integrated circuits (FPGAs). Two design strategies are considered to improve the performance. Primitive functions are hardware-implemented using FPGAs (software/hardware migration). More complex functions are mapped onto a multi processor system formed by TMS320C40. This computer architecture is designed for the well known algorithm for qualitative simulation-Qsim5]. In this paper we present the design of a computer architecture for the constraint-check-function | a function of the Qsim kernel.